Last Modified:2023/05/28
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Tsutomu Sasao received the B.E., M.E., and Ph.D. degrees in Electronics Engineering from Osaka University, Osaka Japan, in 1972, 1974, and 1977, respectively.

He has held faculty/research positions at Osaka University, Japan; IBM T. J. Watson Research Center, Yorktown Heights, NY; the Naval Postgraduate School, Monterey, CA; and Kyushu Institute of Technology, Iizuka, Japan. He was a Professor at the Department of Computer Science, Meiji University, Kawasaki, Japan, during April 1, 2013 to March 31, 2020. Currently, he is a visiting researcher of Meiji University.

His research areas include logic design and switching theory, representations of logic functions, and multiple-valued logic.

He has published more than 10 books on logic design including, Logic Synthesis and Optimization, Representation of Discrete Functions, Switching Theory for Logic Synthesis, Logic Synthesis and Verification, Memory-Based Logic Synthesis, Index Generation Functions, Classification Functions for Machine Learning and Data Mining, in 1993, 1996, 1999, 2001, 2011, 2019, and 2023 respectively.

He has served Program Chairman for the IEEE International Symposium on Multiple-Valued Logic (ISMVL) many times. Also, he was the Symposium Chairman of the 28th ISMVL held in Fukuoka,Japan, in 1998.

He received the NIWA Memorial Award in 1979, Takeda Techno-Entrepreneurship Award in 2001, and Distinctive Contribution Awards from IEEE Computer Society MVL-TC for papers presented at ISMVLs in 1986, 1996, 2003, 2004, 2013 and 2019. He has served as an associate editor of the IEEE Transactions on Computers. He is a Life Fellow of the IEEE.