Publication 2002

• S. Nagayama, T. Sasao, Y. Iguchi and M. Matsuura, "Representations of logic functions using QRMDDs," 32th International Symposium on Multiple-Valued Logic (ISMVL-2002), Boston, U.S.A, May 22-24, 2002, pp.261-267. PDF
• T. Sasao, Y. Iguchi and M. Matsuura, "Comparison of decision diagrams for multiple-output logic functions," International Workshop on Logic and Synthesis (IWLS2002), New Orleans, Louisiana, June 4-7, 2002, pp.379-384. PDF
• A. Mishchenko and T. Sasao, "Encoding of Boolean functions and its application to LUT cascade synthesis, " International Workshop on Logic and Synthesis (IWLS2002), New Orleans, Louisiana, June 4-7, 2002, pp.115-120. PDF
• T. Sasao, "Design methods for multi-rail cascades,"(invited paper) International Workshop on Boolean Problems (IWBP2002), Freiberg, Germany, Sept. 19-20, 2002, pp. 123-132. PDF
• T. Sasao, M. Matsuura, and Y. Iguchi, "A design method for irredundant cascades," International Symposium on New Paradigm VLSI Computing, Sendai, Japan, Dec. 12-14, 2002, pp.37-40. PDF
• T. Sasao, J.T. Butler, and M. Matsuura, "Average path length as a paradigm for the fast evaluation of functions represented by binary decision diagrams," International Symposium on New Paradigm VLSI Computing, Sendai, Japan, Dec. 12-14, 2002, pp.31-36. PDF
• M. Matsuura, T. Sasao, J.T. Butler, and Y. Iguchi, "Bi-partition of shared binary decision diagrams," IEICE Transactions on Fundamentals of Electronics, Vol.E85-A, No.12, Dec. 2002, pp.2693-2700. PDF
• C. Moraga, T. Sasao, and R. Stankovic, "A unifying approach to edge-valued and arithmetic transform decision diagrams," Automation and Remote Control, Vol. 63, No. 1, 2002, pp 125-138. PDF