7th International Symposium on Representations and Methodology of Future Computing Technologies RM2005 (ReedMuller 2005) Preliminary Technical Program ------------------------------------------------------------------- Monday, 5 September, 2005 0830-1700 Registration 0850-0900 Welcome 0900-1000 Session 1. Invited Talk 1 Title: Current Trends of Quantum Computing Speaker: Hiroshi IMAI University of Tokyo 1000-1030 Break 1030-1230 Session 2. Session Chair: T.B.D. Title: Improving Template Matching for Minimizing Reversible Toffoli Cascades Authors: Nathan Scott, Gerhard W. Dueck and Dmirti Maslov University of New Brunswick, University of Victoria Title: Quantum Ordered Binary Decision Diagrams with Repeated Tests Authors: Matthias Homeister and Stephan Waack Georg-August-UniversitAat GAottingen Title: Quantum Realization of Ternary Parallel Adder/Subtractor with Look-Ahead Carry Authors: Mozammel H. A. Khan and Marek A. Perkowski East West University, Portland State University Title: Quantum Realization of Ternary Encoder and Decoder Authors: Mozammel H. A. Khan and Marek A. Perkowski East West University, Portland State University 1230-1400 Lunch 1400-1530 Session 3. Session Chair: T.B.D. Title: Splitting Versus Unfolding Authors: Mohammad GhasemZadeh and Christoph Meinel University of Potsdam Title: Parallelized Implementation of Reachability Analysis Using Partitioned- ROBDDs on PC-cluster Authors: Yoshihisa Kojima, Kenshu Seto, Satoshi Komatsu and Masahiro Fujita University of Tokyo Title: Test Set Generation and Fault Localization Software for Reversible Circuits Authors: Dean Pierce, Jacob Biamonte and Marek Perkowski Portland State University 1530-1600 Break 1600-1730 Session 4. Session Chair: T.B.D. Title: A Graph-Based Representation for Analyzing Fast Addition Algorithms Authors: Naofumi Homma, Takafumi Aoki and Tatsuo Higuchi Tohoku University, Tohoku Institute of Technology Title: A New Reversible TSG Gate and Its Application For Designing Efficient Adder Circuits Authors: Himanshu Thapliyal and M.B Srinivas International Institute of Information Technology Title: LUT Cascades and Emulators for Realization of Logic Functions Authors: Tsutomu SASAO, Yukihiko IGUCHI and Munehiro MATSUURA Kyushu Institute of Technology, Meiji University 1800- Banquet on the river Tuesday, 6 September, 2005 0900-1000 Session 5. Invited Talk 2 Title: Molecular Computation Using Hairpins and Secondary Structures of DNA Speaker: Masami HAGIYA University of Tokyo 1000-1030 Break 1030-1230 Session 6. Session Chair: T.B.D. Title: Evolutionary Algorithm Based Synthesis of Multi-output Ternary Reversible Circuits Using Quantum Cascades Authors: Md. Mujibur Rahman Khan, Mozammel H. A. Khan and Md. Mostofa Akbar Bangladesh University of Engineering and Technology, East West University Title: Reed-Muller Spectra Based Synthesis of Reversible Circuits Using a Quantum Cost Metric Authors: Dmitri Maslov and D. Michael Miller University of Victoria Title: On Realization of 3-qubit Reversible Circuits with the minimum number of non-linear gates Authors: Guowu Yang, Xiaoyu Song, William N. N. Hung, Marek Perkowski Portland State University Title: Minimal Universal Library for n x n Reversible Circuits Authors: Guowu Yang, Xiaoyu Song, Marek A. Perkowski and William N. N. Hung Portland State University 1230-1400 Lunch 1400-1530 Session 7. Session Chair: T.B.D. Title: ATPG for Reversible Circuits using Technology-Related Fault Models Authors: Jeff S. Allen, Jacob D. Biamonte and Marek A. Perkowski Portland State University Title: Discrete Function KL Spectrum Computation over Symmetry Groups of Arbitrary Size Authors: Lun Li and Mitchell A. Thornton Southern Methodist University Title: Synthesis of Ternary Quantum Logic Circuits by Decomposition Authors: Faisal Shah Khan and Marek M. Perkowski Portland State University 1530-1600 Break 1600-1730 Session 8. Session Chair: T.B.D. Title: On approximation by \oplus OBDDs Authors: Henrik Brosenne, Carsten Damm, Matthias Homeister and Stephan Waack UniversitAat GAottingen Title: Quantum Circuit Layout Authors: Vijaya S. Shivgand, Akashdeep Aulakh and Marek Perkowski Portland State University Title: Double Fixed-Polarity Reed-Muller (DFPRM) Design with universal test set of lower length Authors: Hazur Rahaman, Debesh K. Das Bengal Eng. & Sci. University Poster Session Title: Word-Level Expressions with Matrix-Valued Coefficients for the Representation of Discrete Functions Speaker: Radomir S. Stankovic,Jaakko Astola and Claudio Moraga Tampere University of Technology