Advance Programme
of IFIP WG 10.5
Workshop on Applications of the
Reed-Muller Expansion
in Circuit Design
Hamburg, Germany
September 16-17, 1993
(between t-Workshop and Euro-DAC)
About the Workshop:
This workshop focuses on the application of AND-ExOR expressions like the Reed-
Muller expansions, the Kroenecker expansions, the Exclusive-OR Sum-of-Products
form (ESOPs) and others to various aspects of circuit design and
implementation.
AND-ExOR expressions are representations of Boolean functions using ExOR
polynomials which are known to be of lower complexity and can lead to easier
testable implementations than the Sum-of-Products form. The goal of this
workshop is to bring together researchers to discuss new approaches in
efficient minimization algorithms for AND-ExOR expressions, and to compare
OR-based with EXOR-based representations.
The Program Committee selected 26 papers. These will be presented in 5
sessions. A session will take 2 hours, 1 hour for 4 oral presentations
taking 15 minutes each, and one hour for a poster session. During this poster
session each speaker will present his ideas on an additional poster, to allow
extended discussions. Also one poster-only presentation will take place during
each poster session.
The workshop will be held at the University Hamburg, Library of the
Dept. of Chemistry (Building No. 32), Martin-Luther-King-Pl. 6,
near the Congress Center Hamburg.
Sponsors:
This workshop is sponsored by IFIP 10.5.
Information:
For Information about this workshop please contact:
Prof. W. Rosenstiel
Wilhelm-Schickard-Institut fuer Informatik
Sand 13
72076 Tuebingen
Germany
Phone ++49-7071-295482 Fax ++49-7071-610399
email reed-muller@peanuts.informatik.uni-tuebingen.de
Program and Organization Committee:
- U. Kebschull University of Tuebingen, Germany
- M. A. Perkowski Portland State University, USA
- R. Rudell Synopsys Corp. , USA
- T. Sasao Kyushu Inst. of Technology , Japan
- J. Saul University of Bristol, UK
- E. Schubert University of Tuebingen, Germany
Proceedings:
A handout will be distributed to the workshop participants.
Registration Information:
Workshop fees:
Advance registration (Until August 15) DM 200,-
Late registration (After August 15) DM 250,-
The above fees include admission to all workshop events Thursday thru Friday,
Lunch on Thursday and Friday and the Thursday Conference Dinner, and a handout.
Special rates available on site only:
Students DM 60,-
Students must register at-conference and must present a valid Student
Identification. Student registration includes lunch and a handout, it does not
include the Conference Dinner.
Important registration instructions:
1. Full payment in Deutsch Marks or a copy of the bank transfer MUST
accompany registration.
2. To qualify for the lower rate, all Advance Registrations must be
postmarked no later than August 15.
3. Register one person per form (copy adjacent form as needed).
4. Payment must be made in Deutsch Marks (free of any bank transfer
charges) either by check made payable to "Wilhelm-Schickard-Institut"
or by transfer to account Number 67340008 at Volksbank Ammerbuch,
BLZ 64161397 and made payable to "Wilhelm-Schickard-Institut".
5. Please use the keyword "IFIP-Reed-Muller-Workshop" for payment!
6. Telephone registrations will not be accepted.
Hotel Reservations:
Following hotels will accept your reservations until August 15:
Hotel Am Holstenwall
Phone: ++49-40-314051, Fax: ++49-40-316264
single room: DM 192,- double room: DM 268,-
Hotel Baseler Hof
Phone: ++49-40-359060, Fax: ++49-40-35906918
single room: DM 145,-
Motel Hamburg
Phone: ++49-40-4204141, Fax: ++49-40-4229905
single room: DM 130,-
All these hotels are within 2km distance from the workshop location. Please do
your reservations on your own with keyword "Reed-Muller-Workshop".
Reservations can be done for the workshop and the period of Euro-DAC. After
August 15 room reservations will be very difficult!
Technical Program:
Thursday, 16 September, 1993
9.00-11.00 Session A: OR- vs. EXOR-based representations (W. Rosenstiel)
A1 - Towards a Mixed Exclusive-/Inclusive-OR Factored Form,
J. Saul
A2 - The Complexity of Mod-2 Sum PLA's for Symmetric Functions
U. Rollwage
A3 - How much ExOR Improves on OR?
C. Damm
A4 - Minimization of AND-ExOR expressions
B. Steinbach, and G. Kempe
A5 - XOR Canonical Forms of Switching Functions (Poster)
M.A. Perkowski, A. Sarabi, and F.R. Beyl
A6 - Reed-Muller Integrated Research/Teaching/Design Environment
(Demo Presentation)
M.J. Perkowski
11.00-11.15 Coffee Break
11.15-13.15 Session B: Logic Synthesis Methods (T. Sasao)
B1 - Multilevel Logic Synthesis for Cellular FPGAs Based on
Orthogonal Expansions
I. Schaefer, M.A. Perkowski, and H. Wu.
B2 - A Fundamental Theorem for EXOR Circuits
M.A. Perkowski
B3 - Synthesis of Multi-level Reed Muller Circuits using Matrix
Transformations
G. Lee, J.-Y. Chang, T.T. Hwang, Mary J. Irwin, and
Robert M. Owens
B4 - Optimization of the Reed-Muller Exclusive-OR Expansions with
Mixed Polarity for Completely and Incompletely
Specified Functions
M.K. Habib
B5 - A Numerical Method for Reed-Muller Circuit Synthesis (Poster)
M.A. Thornton and V.S.S. Nair
13.15-15.00 Lunch Break
15.00-17.00 Session C: Theoretical studies (M.A. Perkowski)
C1 - Fast Walsh Transform Computation with Binary Decision Diagram
E.M. Clarke, X. Zhao, M. Fujita, and Y. Matsunaga
C2 - Spectral Transforms for Large Boolean Functions with
Applications to Technology Mapping
E.M. Clarke, K.L. McMillan, X. Zhao, and M. Fujita
C3 - An Exact Minimization of AND-EXOR Expressions Using BDDs
T. Sasao
C4 - LP Characteristic Vector of Logic Functions
N. Koda and T. Sasao
C5 - Multilevel Logic Minimization Using K-map XOR Patterns
(Poster)
R.F. Tinder
C6 - Estimations of Shennon's Function for Polarity Reed-Muller
Expressions (Poster)
V. Suprun
Friday, 17 september, 1993
9.00-11.00 Session D: Testability Aspects (J. Saul)
D1 - Rapid Prototyping of Fully Testable Multi-Level AND/ExOR
Networks
R. Drechsler and B. Becker
D2 - Testability of a Class of Multi-level Reed Muller Circuits
G. Lee, M. Hwang, Mary Jane Irwin, and Robert M. Owens
D3 - Minimization of Parity-Checked Fault-Secure AND/EXOR Networks
M. Eggerstedt, N. Hendrich, and K. von der Heide
D4 - Design for Testability Properties of AND/XOR Networks
A. Sarabi and M.A. Perkowski.
D5 - An Approach to PLA Test Pattern Generation Using Reed-Muller
Networks (Poster)
M. Riege and W. Anheier
11.00-11.15 Coffee Break
11.15-13.00 Session E: Graph-based Representations (M. Fujita)
E1 - On the Implementation of a Package for Efficient
Representation and Manipulation of Functional Decision
Diagrams
B. Becker, R. Drechsler, and M. Theobald
E2 - Mod-2-OBBDs -- a Generalization of OBDDs and EXOR-Sum-of-
Products
J. Gergov and C. Meinel
E3 - Some Optimizations for Functional Decision Diagrams
E. Schubert, U. Kebschull, and W. Rosenstiel
E4 - Reed-Muller Binary Decision Diagrams (Poster)
L. McKenzie, L. Xu, and A.E.A. Almaini
13.00 Closing Session & Lunch
IFIP WG 10.5
Workshop on Applications of the
Reed-Muller Expansion
in Circuit Design
Registration Form
To register, mail this form or a copy of this form with payment to:
IFIP-Reed-Muller-Workshop
Technische Informatik
WSI
Sand 13
72076 Tuebingen
Germany
(Fax: ++49-7071-610399)
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